Method for fabricating semiconductor device including recess...

Details Method for fabricating semiconductor device including recess... Method for fabricating semiconductor device including recess...

2011-03-22

2011-03-22

Landau, Matthew C (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S589000, C438S700000, C257SE21629

Reexamination Certificate

active

07910438

ABSTRACT:
A method for fabricating a semiconductor device includes etching a substrate to form a first trench pattern, forming spacers over sidewalls of the first trench pattern, etching a bottom portion of the first trench pattern using the spacers as a barrier to form a second trench pattern, performing an isotropic etching on the second trench pattern to round sidewalls of the second trench pattern and form a bulb pattern, and forming a gate over a recess pattern including the first trench pattern, the rounded second trench pattern and the bulb pattern.

REFERENCES:
patent: 5112771 (1992-05-01), Ishii et al.
patent: 5892252 (1999-04-01), Hammond et al.
patent: 6018174 (2000-01-01), Schrems et al.
patent: 6232171 (2001-05-01), Mei
patent: 6440792 (2002-08-01), Shiao et al.
patent: 6544851 (2003-04-01), Ponomarev et al.
patent: 6557967 (2003-05-01), Lee
patent: 7485557 (2009-02-01), Han et al.
patent: 7492005 (2009-02-01), Chang et al.
patent: 7507651 (2009-03-01), Cho et al.
patent: 7625813 (2009-12-01), Jung
patent: 7629242 (2009-12-01), Han et al.
patent: 2001/0023960 (2001-09-01), Soga et al.
patent: 2003/0211729 (2003-11-01), Lee et al.
patent: 2005/0020086 (2005-01-01), Kim et al.
patent: 2005/0279729 (2005-12-01), Okulan et al.
patent: 2006/0011579 (2006-01-01), Ko
patent: 2006/0113590 (2006-06-01), Kim et al.
patent: 2006/0237817 (2006-10-01), Park
patent: 2006/0246730 (2006-11-01), Kim et al.
patent: 2007/0020890 (2007-01-01), Thakur et al.
patent: 2007/0026632 (2007-02-01), Yamamoto
patent: 2007/0099384 (2007-05-01), Han et al.
patent: 2007/0105388 (2007-05-01), Lee et al.
patent: 2007/0111469 (2007-05-01), Kim et al.
patent: 2007/0123014 (2007-05-01), Han et al.
patent: 2007/0148934 (2007-06-01), Cho et al.
patent: 2007/0224763 (2007-09-01), Fujimoto et al.
patent: 2009/0130852 (2009-05-01), Kewley
patent: 2009/0236684 (2009-09-01), Lee
patent: 2010/0024186 (2010-02-01), Bailey, III
patent: 2010/0038796 (2010-02-01), Wilson
patent: 1630040 (2005-06-01), None
patent: 61-032569 (1986-02-01), None
patent: 10-2005-0011376 (2005-01-01), None
patent: 1020060079331 (2006-07-01), None
patent: 10-0700332 (2007-03-01), None
patent: 10-2007-0069815 (2007-07-01), None
patent: 200520071 (2005-06-01), None
Taylor et al., “The effect of discharge conditions on the inductively coupled plasma oxidation of silicon”, Vacuum, vol. 38, Issues 8-10, 1988, Abstract.
Quirk et al., “Semiconductor Manufacturing Technology”, 2001, pp. 450.

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