Method for fabricating semiconductor device having vertical...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S328000, C257SE21410, C438S212000

Reexamination Certificate

active

07998816

ABSTRACT:
A method for fabricating a semiconductor device includes forming buried bit lines separated from each other by a trench in a substrate, forming a plurality of first pillar holes that expose a top surface of the substrate, forming first active pillars buried in the first pillar holes, forming a gate conductive layer over entire surface of a resultant structure including the first active pillars, forming a gate electrode by etching the gate conducting layer to cover the first active pillars, forming a plurality of second pillar holes that expose the first active pillars by partially etching the gate electrode, and forming second active pillars buried in the second pillar holes and connected to the first active pillars.

REFERENCES:
patent: 5324673 (1994-06-01), Fitch et al.
patent: 7241655 (2007-07-01), Tang et al.
patent: 2007/0190766 (2007-08-01), Seo et al.
patent: 1020070052653 (2007-05-01), None
patent: 1020070058906 (2007-06-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Feb. 23, 2011.

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