Method for fabricating semiconductor device having recess gate

Details Method for fabricating semiconductor device having recess gate Method for fabricating semiconductor device having recess gate

2006-06-29

2009-12-08

Nguyen, Ha Tran T (Department: 2829)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S197000, C257SE29321

Reexamination Certificate

active

07629242

ABSTRACT:
A method for fabricating a semiconductor device having a recess gate includes forming a hard mask pattern on a substrate, etching the substrate using the hard mask pattern as an etch barrier to form a recess pattern, forming a passivation layer protecting surfaces of the recess pattern, etching a bottom surface of the recess pattern while protecting sidewalls of the recess pattern, performing an isotropic etching process onto a bottom portion of the recess pattern, and forming a gate pattern partially buried into the recess pattern after the isotropic etching process is performed.

REFERENCES:
patent: 7154144 (2006-12-01), Kim et al.
patent: 7282429 (2007-10-01), Lai et al.
patent: 7326621 (2008-02-01), Cho et al.
patent: 2006/0049455 (2006-03-01), Jang et al.
patent: 10-2005-0011376 (2005-01-01), None
Wolf et al., “Silicon Processing for the VLSI Era, vol. 1—Process Technology,” 2nd Edition, 2000, p. 687-688 ISBN 0-9616721-6-1.

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