Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-04-09
2004-03-23
Niebling, John (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S142000
Reexamination Certificate
active
06709939
ABSTRACT:
BACKGROUND
1. Technical Field
A method for fabricating a semiconductor device is disclosed. In particular, an improved method for fabricating a semiconductor device is disclosed which provides a difference in junction depth by performing at least one implant process for forming an LDD region in a MOSFET having a thin gate oxide in a high speed device having a silicide (self-aligned silicide).
2. Description of the Related Art
In general, the most important function of a transistor of a semiconductor circuit is a current driving function. A channel width of a metal-oxide-semiconductor field effect transistor (MOSFET) is adjusted in consideration of the current driving function. In the most widely-used MOSFET, an impurity-doped polysilicon layer is used as a gate electrode, and a diffusion region formed by doping an impurity on a semiconductor substrate is used as a source/drain region.
A buried channel is formed in a positive metal-oxide-semiconductor field effect transistor (PMOSFET) which uses an N+ doped polysilicon gate electrode in a complementary metal-oxide-semiconductor field effect transistor (CMOSFET). Here, because a negative metal-oxide-semiconductor field effect transistor (NMOSFET) with a channel on its surface and the PMOSFET have different threshold voltages, there are various restrictions in design and fabrication of the device.
That is, in the CMOSFET using a dual gate electrode, the dual gate electrodes are formed by ion-implanting N-type and P-type impurities twice. Therefore, a photolithography process should be performed twice, and this complicates the fabrication process. Accordingly, the device is easily contaminated due to a wet process, and thus the process yield and reliability of the devices are reduced.
FIGS. 1A through 1C
are cross-sectional views illustrating sequential steps of a conventional method for fabricating such a semiconductor device which is an example of a MOSFeT having a thin gate oxide film.
First, referring to
FIG. 1A
, a field oxide
11
defining an active region is formed on a semiconductor substrate
10
. A thin gate oxide
12
and a polysilicon layer (not shown) are formed on the semiconductor substrate
10
. Thereafter, the polysilicon layer is etched using a gate electrode mask as an etching mask, to form a gate electrode
13
. An LDD (lightly doped drain) region
14
is formed by ion-implanting a low concentration impurity to the semiconductor substrate
10
at both sides of or around the gate electrode
13
. An insulating film spacer
15
is formed at side walls of the gate electrode
13
.
As shown in
FIG. 1B
, a first source/drain region
16
is formed by ion-implanting a high concentration impurity to the semiconductor substrate
10
at both sides of or around the insulating film spacer
15
. Thereafter, a second source/drain region
17
is formed by implanting a dopant having a high diffusion ratio at a low dose.
As shown in
FIG. 1C
, a silicide layer
18
is then formed on the surfaces of the gate electrode
13
, and the semiconductor substrate.
However, the conventional method for fabricating the semiconductor device has a limit due to a shallow junction region resulting from miniaturization of the device. Specifically, the depth of the junction region is increased by the ion implant process for forming the silicide layer
18
, which influences the LDD region
14
due to the close proximity of the silicide layer
18
to the LDD region
14
as shown in FIG.
1
C. Further, when the silicide layer
18
is formed deeply along the rim of the field oxide, a leakage current is considerably increased in the junction region adjacent to the field oxide
11
. Still further, as the height of the field oxide is decreased during subsequent processes, the leakage current increases.
SUMMARY OF THE INVENTION
Accordingly, a method for fabricating a semiconductor device is disclosed which can prevent an increase of the junction leakage current and which can improve the process yield and reliability, by forming a deep junction near the field oxide which does not influence the channel region of a MOSFET where a gate oxide is thin (hereinafter referred to as “a core device”), by partially exposing a source/drain region adjacent to the field oxide to a photolithography process for forming an LDD region of an input/output device between the core device and a MOSFET where the gate oxide film (hereinafter referred to as “a input/output device) is thick in a CMOS fabrication process, and by ion-implanting an impurity thereto at the same time an ion implant process is carried out for forming the LDD region of the input/output device region.
A disclosed method for fabricating a semiconductor device comprises: forming a field oxide defining an active region on a semiconductor substrate having a central core device region and a peripheral input/output device region; forming a gate oxide on the core device region; forming a gate electrode on the gate oxide; forming a first LDD region by ion-implanting a low concentration of impurity ions to the input/output device region of the active region; forming a photoresist film pattern over the gate electrode and on the sides of the gate electrode, the photoresist film pattern reaching from an end of the gate oxide to a part of input/output device region spaced a determined distance from the gate electrode or gate oxide; forming a second LDD region deeper than the first LDD region by implanting a low concentration of impurity ions by using the photoresist film pattern as an ion implant mask; removing the photoresist film pattern; forming an insulating film spacer on side walls of the gate electrode; forming a deep source/drain region and a shallow source/drain region by implanting a high concentration impurity ions to the input/output device region of the active region of the semiconductor substrate at least once, by using the insulating film spacer as an ion implant mask; and forming a silicide film on the gate electrode and the source/drain regions.
A novel semiconductor device made in accordance with the methods disclosed herein is also disclosed.
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Lee Hi Deok
Park Seong Hyung
Lindsay Jr. Walter L.
Niebling John
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