Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-08-23
2002-08-06
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S585000, C438S586000, C438S622000, C438S926000
Reexamination Certificate
active
06429060
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating a semiconductor device in which a gate electrode or an interconnect is formed by using a dummy gate electrode or a dummy interconnect.
Recently, in accordance with increased refinement of processing, a dummy electrode or a dummy interconnect is used in order to improve the accuracy in forming a gate electrode or an interconnect.
Now, a conventional method for fabricating a semiconductor device using a dummy gate electrode or a dummy interconnect will be described with reference to drawings.
FIGS. 26A through 26D
are cross-sectional views for showing procedures in the conventional method for fabricating a semiconductor device.
First, as shown in
FIG. 26A
, gate electrodes
12
are formed on a semiconductor substrate
10
having a plurality of pairs of impurity diffusion layers
11
serving as the source or drain regions and selectively formed in surface portions thereof. Each gate electrode
12
is formed on the semiconductor substrate
10
between each pair of impurity diffusion layers
11
. At this point, the gate electrodes
12
are densely disposed in a first region R
1
on the semiconductor substrate
10
while they are sparsely disposed in a second region R
2
on the semiconductor substrate
10
. Simultaneously with the formation of the gate electrodes
12
, dummy gate electrodes
13
are formed in accordance with the design rule for the gate electrodes
12
in portions of the second region R
2
on the semiconductor substrate
10
where none of the impurity diffusion layers
11
and the gate electrodes
12
is formed. Thus, the gate electrodes
12
and the dummy gate electrodes
13
can be disposed uniformly on the semiconductor substrate
10
as a whole. Therefore, photolithography and etching employed for forming the gate electrodes
12
and the dummy gate electrodes
13
can be uniformly carried out, resulting in accurately forming the gate electrodes
12
and the dummy gate electrodes
13
.
Next, as shown in
FIG. 26B
, a first interlayer insulating film
14
is formed over the semiconductor substrate
10
, and thereafter, first-layer contacts
15
for selectively connecting the impurity diffusion layers
11
to upper layer interconnects (corresponding to metal interconnects
16
of
FIG. 26C
) are formed in the first interlayer insulating film
14
.
Then, as shown in
FIG. 26C
, the interconnects
16
of a metal (hereinafter referred to as the metal interconnects) selectively connected to the first-layer contacts
15
are formed on the first interlayer insulating film
14
. At this point, the metal interconnects
16
are densely disposed in a third region R
3
on the semiconductor substrate
10
while they are sparsely disposed in a fourth region R
4
on the semiconductor substrate
10
. Simultaneously with the formation of the metal interconnects
16
, dummy metal interconnects
17
are formed in accordance with the design rule for the metal interconnects
16
in portions of the fourth region R
4
on the semiconductor substrate
10
where none of the first-layer contacts
15
and the metal interconnects
16
is formed. Thus, the metal interconnects
16
and the dummy metal interconnects
17
can be disposed uniformly on the semiconductor substrate
10
as a whole. Therefore, photolithography and etching employed for forming the metal interconnects
16
and the dummy metal interconnects
17
can be uniformly carried out, resulting in accurately forming the metal interconnects
16
and the dummy metal interconnects
17
.
Next, as shown in
FIG. 26D
, a second interlayer insulating film
18
is formed over the semiconductor substrate
10
, and thereafter, second-layer contacts
19
for selectively connecting the metal interconnects
16
to upper layer interconnects (not shown) are formed in the second interlayer insulating film
18
.
In the conventional method for fabricating a semiconductor device, however, it is necessary to dispose the dummy gate electrodes
13
in consideration of the design rule for the gate electrodes
12
or the impurity diffusion layers
11
as well as it is necessary to dispose the dummy metal interconnects
17
in consideration of the design rule for the metal interconnects
16
, the first-layer contacts
15
or the second-layer contacts
19
. As a result, the circuit area of the resultant semiconductor device is disadvantageously increased.
SUMMARY OF THE INVENTION
In consideration of the aforementioned conventional problem, an object of the invention is preventing the increase of a circuit area in accurately forming a gate electrode or an interconnect by using a dummy gate electrode or a dummy interconnect.
In order to achieve the object, the first method for fabricating a semiconductor device of this invention comprises the steps of simultaneously forming a gate electrode and a dummy gate electrode on a semiconductor substrate; removing the dummy gate electrode; forming an interlayer insulating film on the semiconductor substrate after removing the dummy gate electrode; and forming, in the interlayer insulating film, a plug in a region overlapping with at least a part of a region where the dummy gate electrode has been disposed.
In the first method for fabricating a semiconductor device, after simultaneously forming the gate electrode and the dummy gate electrode, the dummy gate electrode is removed, and then, the interlayer insulating film is formed. Thereafter, the plug is formed in the interlayer insulating film so as to overlap with the region where the dummy gate electrode has been disposed. Therefore, with the accuracy in forming the gate electrode improved by using the dummy gate electrode, the region where the dummy gate electrode has been disposed can be used as the region for forming the plug for selective connection to an upper layer interconnect after removing the dummy gate electrode. Specifically, the area increase of the circuit derived from the use of the dummy gate electrode can be prevented, namely, the circuit area can be as small as that obtained without using the dummy gate. As a result, a semiconductor device having a high degree of integration and high performance can be realized.
In the first method for fabricating a semiconductor device, a photomask used for forming the dummy gate electrode is preferably used in removing the dummy gate electrode.
Thus, the dummy gate can be accurately removed, resulting in improving the reliability of the semiconductor device.
The second method for fabricating a semiconductor device of this invention comprises the steps of forming a pair of impurity diffusion layers serving as source and drain regions in surface portions of a semiconductor substrate; simultaneously forming a gate electrode on the semiconductor substrate between the pair of impurity diffusion layers and a dummy gate electrode on at least one of the pair of impurity diffusion layers; and removing the dummy gate electrode.
In the second method for fabricating a semiconductor device, after forming the gate electrode and the dummy gate electrode on one of the impurity diffusion layers provided on both sides of the gate electrode in the semiconductor substrate, the dummy gate electrode is removed. Therefore, with the accuracy in forming the gate electrode improved by using the dummy gate electrode, the region where the dummy gate electrode has been disposed can be used as a region for forming, for example, a plug for selectively connecting the impurity diffusion layer to an upper layer interconnect after removing the dummy gate electrode. Specifically, the increase of the circuit area derived from the use of the dummy gate electrode can be prevented, namely, the circuit area can be as small as that obtained without using the dummy gate electrode. As a result, a semiconductor device with a high degree of integration and high performance can be realized.
In the second method for fabricating a semiconductor device, a photomask used for forming the dummy gate electrode is preferably used in removing the dummy gate electrode.
Thus, the du
Itoh Kazuo
Yamauchi Hiroyuki
Matsushita Electric - Industrial Co., Ltd.
McDermott & Will & Emery
Quach T. N.
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