Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-12-28
2010-10-19
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21429
Reexamination Certificate
active
07816209
ABSTRACT:
A method for fabricating a semiconductor device includes forming an insulation layer over a substrate including a pattern for forming a multi-plane channel, forming a columnar polysilicon layer over the insulation layer and filling in the pattern, and performing a thermal treatment process.
REFERENCES:
patent: 7230312 (2007-06-01), Gonzalez et al.
patent: 7470588 (2008-12-01), Cho et al.
patent: 7563677 (2009-07-01), Yoo et al.
patent: 2006/0049455 (2006-03-01), Jang et al.
patent: 2006/0138474 (2006-06-01), Yu et al.
patent: 2006/0192249 (2006-08-01), Kim et al.
patent: 2006/0223249 (2006-10-01), Park et al.
patent: 2007/0077713 (2007-04-01), Ha et al.
patent: 2007/0252196 (2007-11-01), Kim et al.
patent: 1020050067730 (2005-07-01), None
patent: 1020070017787 (2007-02-01), None
patent: 1020070030022 (2007-03-01), None
patent: 1020070056766 (2007-06-01), None
Yu et al., “Gate Engineering for Deep-Submicron CMOS Transistors,”IEEE Transactions on Electron Devices45:1253-1262 (1998).
Cho Heung-Jae
Choi Won-Joon
Yang Hong-Seon
Coleman W. David
Enad Christine
Hynix / Semiconductor Inc.
Townsend and Townsend / and Crew LLP
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