Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-12-28
2009-11-17
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S638000
Reexamination Certificate
active
07618860
ABSTRACT:
A method for fabricating a semiconductor device includes forming a first insulating layer over a substrate where a landing contact plug is formed, forming an etch barrier pattern having a line type open region over the first insulating layer, forming a second insulating layer for planarization over the etch barrier pattern, forming a contact mask having a hole type open region over the second insulating layer, performing a self-aligned contact etching process using the etch barrier pattern to etch the second insulating layer disposed under the hole type open region and the first insulating layer disposed under the line type open region to form a contact hole a bottom of which is opened above the landing contact plug, forming a storage node contact plug in the contact hole, and forming a storage node over the storage node contact plug.
REFERENCES:
patent: 2005/0073053 (2005-04-01), Park
patent: 10-2004-0000068 (2004-01-01), None
patent: 10-2004-0011993 (2004-02-01), None
patent: 10-0558036 (2006-02-01), None
patent: 10-0587636 (2006-05-01), None
Blakely & Sokoloff, Taylor & Zafman
Booth Richard A.
Hynix / Semiconductor Inc.
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