Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-05-22
2004-12-14
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S704000
Reexamination Certificate
active
06830979
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating a semiconductor device using a multilayer film composed of two or more oxide films having different properties in a fabrication process therefor and, more particularly, to selective wet etching of the multilayer film.
In ULSI devices each composed of a large number of elements integrated therein, the recent technological trends have been toward further miniaturization, higher density, higher speed, and lower power consumption. In keeping with the trends, the elements composing the ULSI devices have been scaled down increasingly. As the scaling down of the elements proceeds, the thinning of films partly composing the elements and the size reduction of the individual parts thereof are approaching their limits so that the thickness reduction of the films and unexpected deformation of the individual parts are no more negligible. In the case of performing a wet etching process with respect to a multilayer film, control of etching selectivity between the individual films composing the multilayer film is becoming particularly important.
In selectively removing an oxide film in the conventional process of fabricating a ULSI containing a MIS transistor, a vapor-phase HF etching and wet etching using a hydrofluoric acid or a buffered hydrofluoric acid have been used frequently.
If an oxide film having a process damage is to be left by selectively etching a BPSG film (PSG film) through the foregoing vapor-phase HG etching process, however, the oxide film intended to be left may be etched by HF due to a change in the etching properties thereof.
If the hydrofluoric acid or buffered hydrofluoric acid each used commonly to selectively remove only one of two or more oxide films having different etching properties, the oxide film intended to be left is removed disadvantageously due to the low selectivity of the hydrofluoric acid or buffered hydrofluoric acid to the oxide films of different types so that an oxide film having a desired configuration and a desired thickness is not formed.
If wet etching using the hydrofluoric acid or buffered hydrofluoric acid is performed with respect to a silicon substrate or a polysilicon member having a silicon layer with an exposed surface, a stain may occur on the surface of the silicon layer. Upon contact with an atmosphere containing cobalt (Co) or titanium (Ti) during the formation of, e.g., a silicide film in the subsequent step, a Co film or a Ti film is deposited on the stain. As a result, the process of silicidization in the surface portion of the Si substrate is inhibited and a failure may be caused thereby in the semiconductor device.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide means for circumventing the lowering of an etching selectivity in selectively etching one of two oxide films with different properties such as an NSG film and a BPSG film and thereby properly keep the thicknesses and configurations of the oxide films of an element.
A first method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device having a MIS transistor composed of a gate insulating film provided on a semiconductor substrate and a gate electrode provided thereon, the method comprising the steps of: (a) forming a sidewall including a first oxide film and a second oxide film having different etching properties over side surfaces of the gate electrode; (b) performing ion implantation for forming source/drain regions by using the sidewall as a mask; and (c) etching the sidewall by using an aqueous solution mixture containing a hydrofluoric acid and an inorganic acid to selectively remove the second oxide film.
In accordance with the methods an amount of etching of the first oxide film which should not be etched is reduced by etching using the aqueous solution mixture containing the hydrofluoric acid and the inorganic acid and having a high selectivity.
The step (a) includes forming a nondoped silicon oxide film as the first oxide film and forming a doped silicon oxide film as the second oxide film. The arrangement achieves a reduction in the amount of etching of the first oxide film by using the property of the aqueous solution mixture containing the hydrofluoric acid and the inorganic acid, which is a high etching selectivity to each of the nondoped oxide film and the doped oxide film.
Preferably, the nondoped silicon oxide film is an NSG film, a TEOS film, a HTO film, or a plasma oxide film and the doped oxide film is a BPSG film, a PSG film, or a BSG film.
Preferably, the step (c) includes using, as the aqueous solution mixture, an aqueous solution containing a hydrofluoric acid at a concentration selected from the range of 0.01 to 1.0 wt % and an inorganic acid at a concentration selected from the range of 0.001 to 30.0 wt %.
Preferably, the step (c) includes using a hydrochloric acid, a sulfuric acid, or a nitric acid as the inorganic acid.
The present invention is applicable to either of the cases where the gate electrode is composed of polysilicon, polymetal, or metal.
The method further comprises, after the step (c), the step of cleaning with a solution containing an aqueous hydrogen peroxide or an aqueous ozone. The arrangement allows the formation of a stable chemical oxide film on the substrate surface and suppresses the occurrence of a stain.
In that case, a concentration of the hydrogen peroxide in the solution containing the aqueous hydrogen peroxide is preferably in the range of 0.01 to 30.0 wt % and a concentration of the ozone in the solution containing the aqueous ozone is preferably in the range of 0.1 to 150.0 ppm.
The step (a) includes the substeps of: forming the first oxide film over an upper surface and side surfaces of the gate electrode; forming a nitride film on the first oxide film: forming a second oxide film on the nitride film; and etching back the second oxide film to form a multilayer-film sidewall composed of a two-layer film including the first oxide film and the nitride film each having a generally L-shaped configuration and of the second oxide film having a sectoral configuration and the step (c) includes forming, on the side surfaces of the gate electrode, a two-layer-film sidewall composed of the first oxide film and the nitride film each having a generally L-shaped configuration. Even if the MIS transistor is miniaturized, the arrangement ensures the burying of the interlayer insulating film by keeping a wide spacing between gate electrodes.
A second method for fabricating a semiconductor device according to the present invention comprises the steps of: (a) forming, on a substrate, a multilayer film including two insulating films having different etching properties; and (b) selectively etching away the multilayer film by using an aqueous solution mixture of a hydrofluoric acid and an inorganic acid, the step (b) includes increasing an etching selectivity between the two insulating films by using the aqueous solution mixture.
In accordance with the method, an amount of etching of the insulating film which should not be etched is reduced by etching the aqueous solution mixture containing the hydrofluoric acid and the inorganic acid and having a high selectivity.
Preferably, each of the insulating films is a silicon oxide film, a silicon nitride film, or a silicon oxynitride film.
Preferably, the step (b) includes using, as the aqueous solution mixture, an solution containing a hydrofluoric acid at a concentration selected from the range of 0.01 to 1.0 wt % and an inorganic acid at a concentration selected from the range of 0.001 to 30.0 wt. %.
A third method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device having a MIS transistor, the method comprising the steps of: (a) forming a gate oxide film on a surface of a semiconductor substrate; (b) forming, on the gate oxide film, a gate electrode with the gate oxide film being nearly entirely left; (c) forming, over side s
Coleman W. David
Matsushita Electric - Industrial Co., Ltd.
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