Method for fabricating salicide CMOS and non-salicide electrosta

Details Method for fabricating salicide CMOS and non-salicide electrosta Method for fabricating salicide CMOS and non-salicide electrosta

1998-07-27

2000-12-05

Fourson, George

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438218, 438294, 438302, 438305, 438683, H01L 21765

Patent

active

061565938

ABSTRACT:
A method of fabricating an ESD protection circuit without salicide formation is described. First, isolation regions and gate structures are formed on a semiconductor substrate, then device regions and ESD circuit regions are then defined. Next, a first dielectric layer is deposited the over entire semiconductor substrate, and heavily doped source/drain regions are formed in ESD protection circuit region. Next, a second dielectric layer and the first dielectric layer of NMOS areas are etched to form spacers on the sidewalls of the gate structures. Then, N.sup.+ /P.sup.+ ion implantation are performed to form heavily doped source/drain regions of NMOS and PMOS, respectively. Finally, salicide process is performed to form silicide over the exposed surface of the gate, source/drain regions in the NMOS and PMOS active device regions.

REFERENCES:
patent: 5262344 (1993-11-01), Mistry
patent: 5413969 (1995-05-01), Huang
patent: 5589423 (1996-12-01), White et al.
patent: 5620920 (1997-04-01), Wilmsmeyer
patent: 5744839 (1998-04-01), Ma et al.
patent: 5897348 (1999-04-01), Wu
patent: 5920774 (1999-07-01), Wu
patent: 5953601 (1999-09-01), Shiue et al.
patent: 5994176 (1999-11-01), Wu
patent: 5998247 (1999-12-01), Wu

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