Method for fabricating recess gate in semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C439S294000, C439S700000, C257S396000, C257S589000

Reexamination Certificate

active

07838361

ABSTRACT:
A method for fabricating a recess gate in a semiconductor device includes etching a silicon substrate to form a trench that defines an active region, forming a device isolation layer that gap-fills the trench, forming a hard mask layer over the silicon substrate, the hard mask layer comprising a stack of an oxide layer and an amorphous carbon layer, wherein the hard mask layer exposes a channel target region of the active region, and forming a recess region with a dual profile by first etching and second etching the channel target region using the hard mask layer as an etch barrier, wherein the second etching is performed after removing the amorphous carbon layer.

REFERENCES:
patent: 2008/0128799 (2008-06-01), Park et al.
patent: 2008/0132074 (2008-06-01), Kim
patent: 2008/0160698 (2008-07-01), Lee
patent: 2008/0160742 (2008-07-01), Cho et al.
patent: 1020060118072 (2006-11-01), None

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