Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-02-24
2004-05-11
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S275000, C438S276000, C438S278000
Reexamination Certificate
active
06734064
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application serial no. 91 105278, filed on Mar. 20, 2002.
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a memory device. More particularly, the present invention relates to a method for fabricating a read only memory device.
2. Description of Related Art
The read only memory device provides the non-volatile property, wherein the stored information is retained even electrical power is interrupted. As a result, the read only memory device is incorporated into many electronic products to maintain a normal operation for the products. The mask read only memory device is the most fundamental type of read only memory device. A typical mask ROM device uses a channel transistor as the memory device. The programming of a mask ROM device is accomplished by selectively implanting ions to an identified channel region. By altering the threshold voltage, the control of the “on” state and the “off” state of the memory device is thus achieved.
A typical mask read only memory device comprises a polysilicon word line crossing over a bit line. The region under the word line and between the bit lines is the channel region of the memory device. Whether or not ions are implanted to the channel region determines the storage of the binary digit of either “0” or “1”, wherein the implanting of ions to the identified channel region is known as code implantation.
In general, when a code implantation process is performed on a mask read only memory, a patterned photoresist layer that exposes a pre-coding region is formed with a photomask. An ion implantation process is then performed to implant dopants to the pre-coding region in the substrate under the stacked gate structure. Usually, as required by the circuit design, an isolated pattern region and a dense pattern region are formed on a same photomask. An overexposure and an underexposure in the isolated pattern region and in the dense pattern region often occur during the transferring of a mask pattern due to the optical proximity effect. The accuracy of the critical dimension of the transferred pattern is thereby affected. Consequently, a misalignment would result as dopants are being implanted to the identified channel region of a mask read only memory device during the code implantation process. Information that is being stored in the memory cells of the memory device is thus erroneous to adversely affect the operational function of the memory device and the reliability of the products.
Conventionally, to correct the non-uniformity of pattern in the dense pattern region and the isolated pattern region of a coding mask of a mask read only memory device, the optical proximity correction technique is employed to design a mask with a special pattern. However, this type of mask with a special pattern, not only increases the manufacturing time, it also complicates the manufacturing process and increases the manufacturing cost. Further, after the fabrication of the photomask is completed, it is rather difficult to debug the defects in the pattern of this type of photomask.
SUMMARY OF INVENTION
Accordingly, the present invention provides a fabrication method for a read only memory device, wherein the openings in the dense pattern region and in the isolated patter region in the memory cell array of the mask read only memory device are formed having the same dimension, even without the application of the optical proximity correction technique.
Based on the foregoing reasons, the present invention provides a fabrication method for a read only memory device. The method provides a substrate that comprises a memory cell region and a periphery circuit region, wherein a memory cell array is formed in the memory cell region and a plurality of transistors is formed in the periphery circuit region. A precise layer that comprises a plurality of first openings is then formed on the identical. Further these first openings are located above the channel region of each of the first memory cells in the memory cell array. A mask layer that comprises a plurality of second openings and third openings is formed on the substrate. The aforementioned second openings are positioned above a plurality of the pre-coding memory cell regions in the memory cell region, while the third openings are positioned above the gates of the transistors in the periphery circuit region. An ion implantation process is then conducted to code the memory cells in the pre-coding memory cell region and to adjust the threshold voltage of the transistors.
The present invention employs a precise photomask to pattern a pattern-transferred layer (a precise layer), wherein openings are defined above the channel region of each memory cell and the critical dimension of these openings is identical. Another patterned photoresist layer (mask layer) is then formed on the substrate. The patterned photoresist layer exposes a pre-coding memory cell region in the memory cell region and a gates of the transistors in the periphery circuit region. Thereafter, using the pattern-transferred layer (precise layer) and the patterned photoresist layer (mask layer) as a coding mask for the mask read only memory device, the pre-coding memory cell is coded and the threshold voltage of the transistors is adjusted. According to the present invention, the critical dimension of each of the openings in the precise layer is about the same and each opening is precisely corresponded to the channel region of each memory cell. The problem of having critical dimension difference between the coding windows in the isolated pattern region and that in the dense pattern region due to the optical proximity effect is prevented. Further, when the code implantation is being performed on the pre-coding memory cell in the memory cell region, the threshold voltage of the transistors in the periphery circuit region is concurrently adjusted to further simplify the manufacturing process.
Further, the present invention also employs a photoresist layer as the pattern-transferred layer. When the pattern-transferred layer comprises a photoresist material, a deposition step and an etching step can be omitted to further simplify the manufacturing process and to further reduce the manufacturing cost. Moreover, according to the present invention, deviation in the critical dimension between the dense pattern region and the isolated pattern region is mitigated by using two photoresist layers.
Further, the precise layer in the periphery circuit region can be completely opened or selectively opened or completely not opened. The second opening and the third opening in the mask layer can form with one piece of photomask or two pieces of photomask.
The present invention provides a fabrication method for a read only memory device. This method provides a substrate that comprises a memory cell region and a periphery circuit region, wherein a memory cell array is formed in the memory cell region and a plurality of transistors is formed in the periphery circuit region. A mask layer that comprises a plurality of first openings and second openings is formed on the substrate. The first openings are located above a plurality of pre-coding memory cell regions in the memory cell region and the second openings are located above the gates of the transistors in the periphery circuit region. A precise layer is formed on the memory cell region. The precise layer comprises a plurality of third openings, wherein the critical dimension of each of the third openings is identical and the third openings are positioned above the channel region of the pre-coding memory cell in the pre-coding memory cell region. Thereafter, an ion implantation process is conducted to code the pre-coding memory cells in the pre-coding memory cell region and to adjust the threshold voltage of the transistors, using the mask layer and the precise layer as a coding mask.
Accordingly, the present invention employs a photomask to pattern the pattern-transferred layer,
Chang Ching-Yu
Chung Henry
Hsueh Cheng-Chen Calvin
Yang Tahorng
Brewster William M.
Coleman W. David
Jiang Chyun IP Office
MACRONIX International Co. Ltd.
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