Method for fabricating read only memory including a first...

Details Method for fabricating read only memory including a first... Method for fabricating read only memory including a first...

2006-02-14

2006-02-14

Brewster, William M. (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S278000, C438S289000, C438S780000, C438S949000

Reexamination Certificate

active

06998316

ABSTRACT:
A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.

REFERENCES:
patent: 5962888 (1999-10-01), Kim et al.
patent: 2002/0052122 (2002-05-01), Tanaka et al.

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