Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-12-21
2003-12-09
Coleman, William David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S769000
Reexamination Certificate
active
06660593
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a manufacturing process for integrated circuits, and more particularly, to a method for fabricating oxide layers with different thicknesses on a substrate.
2. Description of Related Art
Semiconductor chips typically have gate oxide layers of a single thickness. However, there is still a need for gate oxide layers with varied thicknesses on a single chip. For example, the input-output drivers are often operated at about 5V, which is a higher supply of voltage entering from and external source to the chip. Some devices of the input-output drivers are provided with a thicker gate oxide layer than that used in other devices on the chip because of operational speed requirements.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method for fabricating oxide layers with different thicknesses on a substrate.
To achieve these objects and advantages, and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method for fabricating oxide layers of different thicknesses on a substrate. A field oxide layer is formed on the substrate to define a first active region and a second active region therebetween A first oxide layer is formed over the first and the second active regions. Impurities are implanted into the upper portion of the first oxide layer. The impurities depress the oxidation rate of the first oxide layer. The first oxide layer within the second active region is removed. Most of the upper portion of the first oxide layer is removed, thereby leaving a thin doped oxide layer on the lower portion of the first oxide layer. The substrate is oxidized to form a second oxide layer over the second active region. The second oxide layer has a thickness different from the thickness of the lower portion of the first oxide layer. After removing the thin doped oxide layer, the lower portion of the first oxide layer is exposed and becomes a third oxide layer. The thickness of the third oxide layer is different from that of the second oxide layer, and the thickness difference between them is controlled by the implantation of the impurities.
The oxide layers with different thicknesses are broadly used in a variety of semiconductor devices. The oxide layers with different thicknesses in this invention are applicable to transistors having different operating voltages in the same device. In this application, the thinner of the oxide layers serves as the gate oxide of the low voltage transistor, while the thicker of the oxide layers serves as the gate oxide of the high voltage transistor. The invention provides a method for fabricating oxide layers with different thicknesses. The thickness difference between the oxide layers can be easily controlled. The invention also provides a method of simultaneously forming different gate oxides for transistors having different operating voltages in the same device.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
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patent: 6063670 (2000-05-01), Lin et al.
patent: 6177312 (2001-01-01), He et al.
patent: 6235590 (2001-05-01), Daniel et al.
Chen Yi-Shi
Chiang Shing-Sing
Teng Kuo-Shi
Yung Hao-Chieh
Coleman William David
J.C. Patents
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