Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-09
1999-07-27
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438257, H01L 21336
Patent
active
059306289
ABSTRACT:
A method for fabricating a one-time programmable read only memory includes forming a spacer to cover the sides of the periphery transistor gate before patterning the control gate, then patterning the polysilicon layer to form a floating gate, and then forming a heavily concentrated ion implantation area in the substrate beneath the sides of the floating gate. Since the spacer is deposited on the sidewalls of the polysilicon layer within the peripheral area, but not the memory cell area, the efficiency of programming is improved. In addition, there is no need for extra ion implantation processes for make up for the lower programming efficiency caused by the spacers. Furthermore, the leakage current that is caused by the damage to the field oxide generated during the etching back process for forming the spacer is eliminated.
REFERENCES:
patent: 5723375 (1998-03-01), Ma et al.
patent: 5789294 (1998-08-01), Choi
patent: 5811852 (1998-09-01), Ling
Wolf, S.; Silicon Processing for the VLSI Era, vol. 3; Lattice Press, Sunset Beach, Ca.; pp. 586-587, 608-609, 1995.
Berezny Neal
Niebling John F.
United Microelectronics Corp.
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