Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-07-30
2000-04-18
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438259, H01L 218247
Patent
active
060514655
ABSTRACT:
A method for fabricating a nonvolatile semiconductor memory device according to the present invention includes the steps of: forming a first mask to define a channel of a memory cell in a semiconductor substrate; doping an impurity into the semiconductor substrate by using the first mask, thereby forming a first doped region in the semiconductor substrate; forming a second mask so as to overlap at least one of a first region of the semiconductor substrate where a source is to be formed and a second region of the semiconductor substrate where a drain is to be formed and at least part of the first mask; etching the semiconductor substrate by using the first and second masks, thereby forming a recessed portion in a region of the semiconductor substrate that is not covered with the first and second masks; forming a second doped region in the recessed portion of the semiconductor substrate; and removing the first and second masks, and forming a gate structure including a first insulating film, a floating gate electrode, a second insulating film and a control gate electrode at least over a side surface of the recessed portion and the channel defined by the first mask.
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S. Samachisa, et al., "A 128K Flash EEPROM Using Double-Polysilicon Technology", IEEE Journal of Solid-State Circuits, vol. SC-22, No. 5, PP. 676-683, Oct. 1987.
S. Kianian, et al., "A Novel 3 Volts-Only, Small Sector Erase, High Density, Flash, E.sup.2 PROM", IEEE 1994 Symposium on VLSI Technology Digest of Technical Papers, PP. 71-72, 1994.
Hori Atsushi
Kato Jun-ichi
Booth Richard
Matsushita Electronics Corporation
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