Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-04-15
1999-03-02
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438270, H01L 218246
Patent
active
058770550
ABSTRACT:
A multi-stage read only memory (ROM) device and a method for fabricating the same. The device includes a source/drain pole and a gate in a trench, wherein the gate intersects the source/drain pole at an angle to form a number of memory cells. The fabrication of the multi-stage ROM includes two encoding processes. The first encoding process includes implantation of impurity ions in a portion of memory cells to adjust the threshold voltage, so that some of the memory cells have a first threshold voltage and the others have a second threshold voltage. The second encoding process includes forming a number of dielectric remainders at the bottom of the gate trench of a portion of the memory cells, so that some of the memory cells have a first effective channel width and the others have a second effective channel width. As a result, the memory cells of a ROM are of four types with different combinations of threshold voltages and effective channel widths.
REFERENCES:
patent: 5021355 (1991-06-01), Dhong et al.
patent: 5504025 (1996-04-01), Fong-Chun et al.
patent: 5595927 (1997-01-01), Chen et al.
patent: 5627091 (1997-05-01), Hong
Chaudhari Chandra
United Microelectronics Corp.
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