Method for fabricating memory device having a deep trench...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S248000, C438S247000, C438S388000, C438S390000, C438S391000, C257S304000

Reexamination Certificate

active

06953725

ABSTRACT:
A method of fabricating a memory device having a deep trench capacitor is described. A first conductive layer is formed in the lower and middle portions of a deep trench in a substrate. An undoped semiconductor layer is formed in the upper portion of the deep trench. A mask layer is formed on the substrate, wherein the mask layercovers the periphery of the undoped semiconductor layer that is adjacent to the neighboring region, pre-defined for the active region of the deep trench. An ion implantation process is performed to implant dopants into the undoped semiconductor layer exposed by the mask layer so as to form a second conductive layer. The first and the second conductive layers constitute the upper electrode of the deep trench capacitor.

REFERENCES:
patent: 5214603 (1993-05-01), Dhong et al.
patent: 6140175 (2000-10-01), Kleinhenz et al.
patent: 6184107 (2001-02-01), Divakaruni et al.
patent: 6599825 (2003-07-01), Park
patent: 6828192 (2004-12-01), Gustin et al.
patent: 2003/0013259 (2003-01-01), Chidambarrao et al.

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