Method for fabricating memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Reexamination Certificate

active

07060561

ABSTRACT:
The present invention relates to a method for fabricating a memory device. According to this invention, because the trenches for the isolation structures are etched simultaneously as patterning the first conductive layer and the first dielectric layer, the formed isolation structures are self-aligned with the stacked gate structures, thus increasing the reliability for the memory device by avoiding misalignment problems.

REFERENCES:
patent: 6342715 (2002-01-01), Shimizu et al.
patent: 6667507 (2003-12-01), Shirota et al.
patent: 2003/0197234 (2003-10-01), Farrar

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