Method for fabricating low resistance bit line structures, along

Details Method for fabricating low resistance bit line structures, along Method for fabricating low resistance bit line structures, along

1998-02-27

1999-12-28

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438396, H01L 218242, H01L 2120

Patent

active

060080841

ABSTRACT:
A process for fabricating a DRAM chip, featuring low resistance bit line structures, in a peripheral region, and a cell array containing bit line structures exhibiting low bit line to bit line coupling capacitance, has been developed. The process features creating a first damascene opening, in insulator layers in the peripheral region of the DRAM cell, in which the top portion of the first damascene opening is comprised of a deep trench shape, allowing for low resistance bit line structures, when filled with a conductive material. The process also features the creation of second damascene openings, in an insulator layer in the cell array region of the DRAM chip, with the top portion of the second damascene openings exhibiting a shallow trench shape, again allowing bit line structures to be created after filling again with a conductive layer, but with low bit line to bit line coupling capacitance, achieved as a result of the thin metal fill, in the shallow trench opening.

REFERENCES:
patent: 4944836 (1990-07-01), Beyer et al.
patent: 5045899 (1991-09-01), Arimoto
patent: 5550078 (1996-08-01), Sung
patent: 5550769 (1996-08-01), Hidaka et al.
patent: 5783470 (1998-07-01), Rostoker
patent: 5858831 (1999-01-01), Sung
patent: 5930624 (1999-07-01), Murata et al.
C.Y. Chang & S.M. Sze, "VLSI Technology", The McGraw-Hill Company, Inc, c. 1997. p. 444-5.

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