Method for fabricating LOCOS isolation having a planar surface w

Details Method for fabricating LOCOS isolation having a planar surface w Method for fabricating LOCOS isolation having a planar surface w

1998-10-16

2000-11-28

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438431, 438439, 438446, 438692, H01L 21331, H01L 2176, H01L 21302

Patent

active

06153482&

ABSTRACT:
A method for fabricating LOCOS isolation having a planar surface. The method utilizes a polysilicon spacer to prevent bird beak. The method adds the steps of forming a polishing stop layer and removing said edge-protrusion portion of the local oxide by chemical mechanical polishing.

REFERENCES:
patent: 4356211 (1982-10-01), Riseman
patent: 5246537 (1993-09-01), Cooper et al.
patent: 5252503 (1993-10-01), Pasch
patent: 5895253 (1999-04-01), Akram

Affiliated with

Also associated with

Rating

Method for fabricating LOCOS isolation having a planar surface w does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating LOCOS isolation having a planar surface w, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating LOCOS isolation having a planar surface w will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1724927