Method for fabricating locally strained channel

Details Method for fabricating locally strained channel Method for fabricating locally strained channel

2005-02-22

2005-02-22

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S305000, C438S300000, C438S264000

Reexamination Certificate

active

06858506

ABSTRACT:
A manufacturing method for a semiconductor device is provided, wherein a silicon germanium (Si1-xGex; SiGe) layer and a strained silicon layer are sequentially formed on a semiconductor substrate. A gate oxide layer and a gate structure are further formed on the strained silicon layer. The gate structure and the strained silicon layer are heavily doped with n-type dopants to form a compressed gate and source/drain regions, respectively. A cap layer is further formed over the semiconductor substrate, followed by conducting an annealing process. The cap layer is subsequently removed.

REFERENCES:
patent: 6071783 (2000-06-01), Liang et al.
patent: 6600170 (2003-07-01), Xiang

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