Method for fabricating leadless packages with mold locking...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S112000, C438S123000, C438S508000, C438S508000, C438S508000

Reexamination Certificate

active

10973385

ABSTRACT:
A method for fabricating leadless packages with mold locking characteristics is disclosed. A provided leadless leadframe has a plurality of units in a matrix, each unit includes an improved die pad with a plurality of indentations, such as semi-vias in the sidewall thereof and a plurality of leads around the die pad. After chip attachment and electrical connection, a plurality of package bodies for semiconductor packages are individually formed on the corresponding units and covered the indentations in order to enhance the horizontal mold locking capability of the die pad. Using punching, connecting bars of the leadless leadframe are removed to isolate the leadless packages.

REFERENCES:
patent: 6143981 (2000-11-01), Glenn
patent: 7042068 (2006-05-01), Ahn et al.
patent: 7125747 (2006-10-01), Lee et al.
patent: 63-302545 (1988-12-01), None
patent: 2-97048 (1990-04-01), None

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