Method for fabricating high aspect ratio MEMS device with...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

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C438S055000, C257SE23001

Reexamination Certificate

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07618837

ABSTRACT:
The invention discloses a novel flexible, modular fabrication method for integrated high aspect ratio single crystal silicon microstructures designed and manufactured in a post conventional CMOS process (Post-CMOS). The method involves the standard circuits formation, the electrical isolation trenched etching and refilling, backside etching, interconnection formation, and structure releasing. Further, a method of tailoring the trench profile for refill the trench fully without void is also disclosed.

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patent: 6180480 (2001-01-01), Economikos et al.
patent: 6291875 (2001-09-01), Clark et al.
patent: 6551849 (2003-04-01), Kenney
patent: 6972471 (2005-12-01), Yang et al.
patent: 2004/0082140 (2004-04-01), Yang et al.
patent: 2005/0109081 (2005-05-01), Zribi et al.
patent: WO-2004/044958 (2004-05-01), None

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