Method for fabricating forward and reverse blocking devices

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into...

Reexamination Certificate

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C438S218000

Reexamination Certificate

active

07442630

ABSTRACT:
A power device includes a gate electrode, a source electrode, and a drain electrode provided within an active region of a semiconductor substrate of first conductivity type. A vertical diffusion region of second conductivity is provided at a periphery the active region. The vertical diffusion region extends continuously from a top surface of the substrate to a bottom surface of the substrate. The vertical diffusion region includes an upper portion having a first depth and a lower portion having a second depth that is substantially greater than the first depth.

REFERENCES:
patent: 3574009 (1971-04-01), Chizinsky et al.
patent: 4042448 (1977-08-01), Chang
patent: 4066483 (1978-01-01), D'Altroy et al.
patent: 4351677 (1982-09-01), Mochizuki et al.
patent: 4450467 (1984-05-01), Nagano et al.
patent: 4717940 (1988-01-01), Shinohe et al.
patent: 4720469 (1988-01-01), Keser et al.
patent: 4914496 (1990-04-01), Nakagawa et al.
patent: 4967255 (1990-10-01), Bauer et al.
patent: 4994885 (1991-02-01), Yoshizawa
patent: 5072312 (1991-12-01), Schwarzbauer et al.
patent: 5077224 (1991-12-01), Schwarzbauer et al.
patent: 5084401 (1992-01-01), Hagino
patent: 5105244 (1992-04-01), Bauer
patent: 5119153 (1992-06-01), Korman et al.
patent: 5155569 (1992-10-01), Terashima
patent: 5164802 (1992-11-01), Jones et al.
patent: 5202750 (1993-04-01), Gough
patent: 5248622 (1993-09-01), Matsuda et al.
patent: 5286655 (1994-02-01), Tsunoda
patent: 5298457 (1994-03-01), Einthoven et al.
patent: 5360746 (1994-11-01), Terashima
patent: 5372954 (1994-12-01), Terashima
patent: 5440164 (1995-08-01), Finney et al.
patent: 5994189 (1999-11-01), Akiyama
patent: 6037631 (2000-03-01), Deboy et al.
patent: 6091086 (2000-07-01), Zommer
patent: 6376891 (2002-04-01), Nagatani et al.
patent: 6441445 (2002-08-01), Leonardi et al.
patent: 0 312 088 (1989-04-01), None
patent: 361 316 (1990-04-01), None
patent: 0 521 558 (1993-01-01), None
patent: 53-118367 (1978-10-01), None
patent: WO 01/18875 (2001-03-01), None
patent: WO 01/36654 (2001-05-01), None
Ajit, “1200V High-Side Lateral MOSFET in Junction-Isolated Power IC Technology Using Two Field-Reduction Layer,”IEEE(1993), pp. 230-235.
Temple, “MOS-Controlled Thyristors—A New Class of Power Devices,”IEEE Trans. Elec.Dev., vol. ED-33, pp. 1609-1618 (1989).
Temple, “Power Device Evolution and the MOS-Controlled Thyristor,”PCIM, pp. 23-29 (1987).
Wolf et al., “Silicon Processing for the VLSI Era,”Latice Press, 1:28 (1986).

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