Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-02-01
2005-02-01
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S287000, C438S931000
Reexamination Certificate
active
06849504
ABSTRACT:
A method for fabricating a flash memory is described. A stacked gate structure and a source/drain are formed on a substrate. An inter-layer dielectrics and a plurality of inter-metal dielectric layers are then formed over the substrate, wherein at least one layer among the inter-layer dielectrics and the inter-metal dielectric layers has a silicon carbide layer formed thereon. The silicon carbide layer is formed to protect the memory device from an UV irradiation, so as to prevent data errors occurring in the memory device.
REFERENCES:
patent: 6492222 (2002-12-01), Xing
patent: 6492734 (2002-12-01), Watanabe
patent: 20020115310 (2002-08-01), Ueda
patent: 20020155689 (2002-10-01), Ahn et al.
patent: 20030027413 (2003-02-01), Tsui
Chang Ping-Yi
Jeng Pei-Ren
Chaudhari Chandra
Jiang Chyun IP Office
MACRONIX International Co., Ltd
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