Method for fabricating field-effect transistor structures...

Details Method for fabricating field-effect transistor structures... Method for fabricating field-effect transistor structures...

2007-09-04

2007-09-04

Luu, Chuong Anh (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S588000, C438S592000, C438S652000

Reexamination Certificate

active

11167510

ABSTRACT:
Provided is a method for fabricating gate electrode structures each having at least one individual polysilicon layer and a metal layer. A polysilicon layer is provided and patterned prior to the application of the gate metal. Trenches between the resulting gate structures are filled, and the polysilicon is drawn back to below the top edge of the fillings. The relief formed from the fillings and the polysilicon which has been caused to recede forms a shape which is used to pattern the gate metal without a lithographic step. The provision of a gate sacrificial layer, which is patterned together with the polysilicon layer, makes it possible to form contact structures from a contact metal prior to the application of the gate metal.

REFERENCES:
patent: 5966597 (1999-10-01), Wright
patent: 6198144 (2001-03-01), Pan et al.
patent: 6207543 (2001-03-01), Harvey et al.
patent: 6335254 (2002-01-01), Trivedi
patent: 6383882 (2002-05-01), Lee et al.
patent: WO 2004/010507 (2004-01-01), None

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