Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-12-06
2005-12-06
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S216000, C438S279000, C438S585000
Reexamination Certificate
active
06972224
ABSTRACT:
A method of fabricating a MOS transistor that comprises a dual-metal gate that is formed from heterotypical metals. A gate dielectric (34), such as HfO2, is deposited on a semiconductor substrate. A sacrificial layer (35), is next deposited over the gate dielectric. The sacrificial layer is patterned so that the gate dielectric over a first (pMOS, for example) area (32) of the substrate is exposed and gate dielectric over a second (nMOS, for example) area (33) of the substrate continues to be protected by the sacrificial layer. A first gate conductor material (51) is deposited over the remaining sacrificial area and over the exposed gate dielectric. The first gate conductor material is patterned so that first gate conductor material over the second area of the substrate is etched away. The sacrificial layer over the second area prevents damage to the underlying dielectric material as the first gate conductor material is removed.
REFERENCES:
patent: 6410376 (2002-06-01), Ng et al.
patent: 6563178 (2003-05-01), Moriwaki et al.
patent: 6642132 (2003-11-01), Cho et al.
patent: WO 01/97257 (2001-12-01), None
patent: WO 01/97257 (2001-12-01), None
Samavedam et al., “Dual-Metal Gate CMOS with HfO2Gate Dielectric,” 2002IEDM Technical Digest,pp. 17.2.1-17.2.4, 2002.
Yeo et al., “Dual-Metal Gate CMOS Technology with Ultrathin Silicon Nitride Gate Dielectric,”IEEE Electron Device Letters,May 2001, vol. 22, No. 5, pp. 227-229.
Gilmer David C.
Samavedam Srikanth B.
Tobin Philip J.
Chen Jack
Clingan, Jr. James L.
Freescale Semiconductor Inc.
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