Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-01-20
1999-02-23
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438255, H01L 218242
Patent
active
058743340
ABSTRACT:
A method for fabricating a DRAM capacitor comprising the steps of forming silicon nitride spacers twice, not only serving as etching stop layer in a self-aligned contact etching process, but also used as a protective layer for the bit line and gate electrode in an etching operation. In another aspect, using silicon nitride spacers has the advantage of being capable of increasing the width of a contact opening. Hence, a contact opening having a smaller height to width ratio can be produced. Furthermore, the lower electrode of the capacitor in this invention is a pillar-shaped structure, and together with the formation of a hemispherical grained silicon layer over the lower electrode, the surface area of the capacitor can be greatly increased. Moreover, a dielectric layer having a high dielectric constant can be used; hence, a capacitor with sufficient capacitance can be provided although the surface area of the storage capacitor is reduced.
REFERENCES:
patent: 5706164 (1998-01-01), Jeng
patent: 5710073 (1998-01-01), Jeng et al.
Chien Sun-Chieh
Jenq Jason
Tsai Jey
United Microelectronics Corp.
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