Method for fabricating deep trench capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S386000

Reexamination Certificate

active

06964898

ABSTRACT:
A method for fabricating a trench capacitor is disclosed. A substrate is etched to form a first trench recess with a first depth. A spacer layer is deposited on interior surface of the first trench recess. The spacer layer is anisotropic etched back to form a spacer on sidewall of the first trench recess, and through the first trench recess, continuing to etch the substrate so as to form a second trench recess with a second depth. A silicon oxide layer is formed on interior surface not covered by the spacer within the second trench recess. The silicon oxide layer is then anisotropic etched to form a self-aligned collar oxide layer on sidewall of the second trench recess. Through the second trench recess, etching continues to remove the substrate to form a deep trench recess with a third depth. The deep trench recess is thereafter doped to form a diffusion region at a lower portion of the deep trench recess. A capacitor dielectric layer is then formed under the self-aligned collar oxide layer on interior surface of the deep trench recess. The deep trench recess is filled with a first conductive layer. The first conductive layer is then recess etched to form a first conductive stud within the deep trench recess. The first conductive stud has a top surface that is lower than the surface of the substrate, but is higher than the self-aligned collar oxide layer.

REFERENCES:
patent: 6838334 (2005-01-01), Gluschenkov et al.

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