Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-11
1998-10-27
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438254, 438255, H01L 218242
Patent
active
058277668
ABSTRACT:
The present invention provides two main embodiments of a method of manufacturing a high capacitance cylindrical capacitor for a DRAM. The capacitor of the invention has a high capacitance because of the addition area 48C under the upper cylinder 48A and the hemispherical grain (HSG) layer 49 72. The first embodiment of the invention forms a HSG layer 49 over the inside of the cylindrical electrode 48A. The second embodiment forms a HSG layer 72 over both the inside and outside of the cylindrical electrode 70A. The invention also features four preferred methods for forming the first and second openings 30 34 in the second insulating layer. The first and second preferred methods use two optical masks to define the openings 30 34. The third and fourth methods use one photoresist layer 100 with 3 different thickness areas and a three step etch to define the first and second openings 30 34.
REFERENCES:
patent: 5235199 (1993-08-01), Hamamoto et al.
patent: 5278437 (1994-01-01), Wakamiya
patent: 5280444 (1994-01-01), Motonami et al.
patent: 5731130 (1998-03-01), Tseng
patent: 5731808 (1998-03-01), Tseng
Ackerman Stephen B.
Industrial Technology Research Institute
Saile George O.
Stoffel William J.
Tsai Jey
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