Method for fabricating complementary MOS transistor

Details Method for fabricating complementary MOS transistor Method for fabricating complementary MOS transistor

1998-01-14

2000-09-05

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438304, 438368, H01L 21225

Patent

active

061142085

ABSTRACT:
A method for fabricating complementary metal-oxide-semiconductor (CMOS) devices and circuits resulting therefrom are provided. The method includes forming the source and drain regions of the CMOS device by out-diffusion of ions injected into a conductive spacer. The method also includes forming the gate electrode after the source and drain regions have been activated by heat treatment. By forming the gate electrode after heat treating the source and drain regions, the material used to form the gate electrode is not distorted due to heat.

REFERENCES:
patent: 4546535 (1985-10-01), Shepard
patent: 4764481 (1988-08-01), Alvi et al.
patent: 5196357 (1993-03-01), Boardman et al.
patent: 5270232 (1993-12-01), Kimura et al.
patent: 5545579 (1996-08-01), Liang et al.
patent: 5696016 (1997-12-01), Chen et al.
patent: 5904516 (1999-05-01), Park

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