Method for fabricating CMOS transistor with self-aligned silicid

Details Method for fabricating CMOS transistor with self-aligned silicid Method for fabricating CMOS transistor with self-aligned silicid

1995-09-25

1999-09-07

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438592, 438655, 438683, H01L 218238

Patent

active

059500832

ABSTRACT:
A method for fabricating a CMOS transistor having a salicide structure is disclosed. A naturally formed oxide film covering surfaces of polycrystalline silicon film patterns, a P-type diffusion layer and an N-type diffusion layer is removed. Then, by introducing at least a titanium tetrachloride gas and a hydrogen gas into an electron cyclotron resonance plasma excited chemical vapor deposition system using microwaves (or into a plasma excited chemical vapor deposition system using helicon waves), titanium/silicide films are selectively formed on surfaces of the polycrystalline silicon film patterns and the P-type diffusion layer and the N-type diffusion layer. The crystal structure of the titanium/silicide films is of a C54 structure. During the formation of the titanium/silicide film, it is possible to suppress the occurrence of bridging and condensation phenomena.

REFERENCES:
patent: 5326404 (1994-07-01), Sato
patent: 5508066 (1996-04-01), Akahori
S. Wolf, Silicon Processing for the VLSI Era, vol. II, pp. 144-151, 435-437, Jun. 1990.
W. Tsai et al., IEEE Trans. Electron Dev., 41(8)(Aug. 1994)1396 "Effect of ECR H,Ne,Ar & Xe Plasma Precleaning on TiSi Formation".
A.L. De Laere et al., Semicond. Sci. Technol. 5(1990)745 ". . . Surface Pretreatment . . . CoSi Formation".
R. Tobe et al., Thin Solid Films, 281-282 (1996) 155 "PECVD of TiN and Ti . . . helicon plasma".
"Ti Salicide Process for Subquarter-Micron CMOS Devices"; Goto et al; IEICE Trans Electron vol. E77-C, No. 3, pp. 480-485; Mar. 1994.

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