Method for fabricating CMOS device having low and high resistanc

Details Method for fabricating CMOS device having low and high resistanc Method for fabricating CMOS device having low and high resistanc

1995-03-17

1997-04-15

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

257350, 257380, 438238, 438385, 438659, H01L 2170

Patent

active

056209223

ABSTRACT:
A method for fabricating a semiconductor device having a high-resistance polysilicon and low-resistance polysilicon on the surface of a substrate comprises forming a gate oxide film on the substrate, forming a polysilicon film on the gate oxide film, and simultaneously forming a resistance, a wire, and a gate electrode from the polysilicon film by etching using a resist as a mask. Impurities are introduced into the polysilicon for controlling a resistance value thereof to form the high-resistance polysilicon resistance through ion implantation. Impurities are also introduced into the polysilicon to form the low-resistance polysilicon wire through ion implantation. N-type impurities are introduced into the gate electrode of a PMOS transistor and the source and drain regions of the PMOS transistor through ion implantation. P-type impurities are introduced into the gate electrode of an NMOS transistor and the source and drain regions of the NMOS transistor through ion implantation.

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