Method for fabricating CMOS device

Details Method for fabricating CMOS device Method for fabricating CMOS device

1999-06-28

2001-02-27

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06194256

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a CMOS device using an silicon-on-insulator(SOI) substrate, and more particularly to a method for fabricating CMOS device capable of improving mobility of electron and hole.
2. Description of the Related Art
Due to the fast development in semiconductor device industry, a semiconductor device using the SOI substrate instead of a silicon substrate made of bulk silicon, has been proposed. According to this SOI device, adjoining devices are completely isolated from each other and a reduction of the junction capacitance can be obtained, therefore a low power and high speed device can be manufactured.
FIG. 1
is a cross-sectional view showing a conventional SOI substrate provided with a field oxide film. As shown in the drawing, the SOI substrate
10
has a stacking structure comprising a base layer
1
as a supporting means and a semiconductor layer
3
in which a device is to be formed later, and a buried oxide layer
2
being sandwiched between the base layer
1
and the semiconductor layer
3
. This SOI substrate
10
is generally manufactured by the SIMOX(separation by implanted oxygen) method implanting oxygen ions and the bonding method that two silicon substrates are bonded each other.
The characteristic of the device formed on the SOI substrate depends on the thickness of semiconductor layer. For instance, the characteristic of the device is improved when the thickness of semiconductor layer
3
is uniform. The thickness of semiconductor layer
3
is preferable to be set below 100 nm.
On the other hand, as shown in the drawing, in the SOI substrate
10
provided with an isolation layer, i.e. the field oxide film
4
formed by the LOCOS process, the field oxide film
4
is formed to be contacted with the buried oxide layer
2
, therefore an external stress is applied to the semiconductor layer
3
during the formation of field oxide film
4
. However, when a CMOS device comprising NMOS and PMOS is formed on the semiconductor layer
3
, it is difficult to expect an enhanced CMOS device.
In detail, it is well known that when a CMOS comprising NMOS and PMOS is formed in the semiconductor layer being affected by the external stress, the electron mobility in the NMOS is decreased while the hole mobility in the PMOS is increased. For example, the more the stress within the semiconductor layer, the smaller the electron mobility, and the more the compressive stress within the semiconductor layer, the more the hole mobility.
Further, it is disclosed in the “Silicon-On-Insulator technology and devices VIII” edited by S. Cristoloveanu, pp. 335 that the hole mobility in the semiconductor layer of the SOI substrate, is larger than the hole mobility in the bulk silicon when the compressive stress is applied to the semiconductor layer.
Accordingly, the CMOS device with high speed and low power consumption should have a desired degree of hole mobility in the PMOS and electron mobility in the NMOS device. However, when the CMOS device is formed on the SOI substrate by the conventional method, both mobilities are not improve at the same time, therefore it is difficult to obtain those properties applicable to the manufacturing process of the device with high speed and low power consumption.
SUMMARY OF THE INVENTION
Therefore, it is the object of the present invention to provide a method for fabricating CMOS device capable of improving the electron mobility in the NMOS and the hole mobility in the PMOS.
To accomplish the foregoing object, the present invention provides a method for fabricating CMOS device comprising the steps of: providing an SOI substrate having a stacking structure of a base layer, a buried oxide layer and a semiconductor layer, wherein the SOI substrate is divided into a first region where a PMOS is formed later and a second region where an NMOS is formed later; forming first field oxide films to be contacted with the buried oxide layer by applying a thermal oxidation to a selected portion of the semiconductor layer being disposed in the first region of the SOI substrate; forming trenches with a depth to be contacted with the buried oxide layer in a selected portion of the semiconductor layer being disposed in the second region of the SOI substrate and then forming second field oxide films by filling the trenches with an insulating layer; and forming the PMOS in the portion of the semiconductor layer being defined by those first field oxide films, and the NMOS in the portion of the semiconductor layer being defined by those second field oxide films.
The present invention further provides a method for fabricating a CMOS device comprising: providing an SOI substrate having a stacking structure of a base layer, a buried oxide layer and a semiconductor layer, wherein the SOI substrate is divided into a first region where a PMOS is formed later and a second region where an NMOS is formed later; forming a pad oxide layer and a nitride layer on the semiconductor layer of the SOI substrate successively; patterning the pad oxide layer and the nitride layer to expose selected portions of the semiconductor layer being disposed in the first region of the SOI substrate; forming first field oxide films by applying the thermal oxidation to the exposed portions of the semiconductor layer; forming a mask pattern to expose selected portions of the nitride layer being disposed in the second region of the SOI substrate over a resultant; forming trenches to expose the buried oxide layer by etching the exposed portions of the nitride layer, the pad oxide layer portion beneath the exposed nitride layer and the semiconductor layer; removing the mask pattern; forming an insulating layer over the entire resultant with a thickness enough to fill the trenches; polishing the insulating layer by using the nitride layer as a polishing stopper; forming second field oxide films of trench type by etching the nitride layer, The pad oxide layer, the insulating layer remained on those first field oxide films and a selected thickness of the insulating layer filled in the trench; and forming the PMOS in the portion of the semiconductor layer being defined by those first field oxide films, and forming the NMOS in the portion of the semiconductor layer being defined by those second field oxide films.


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