Method for fabricating CMOS analog semiconductor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438210, 438297, H01L 218238

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active

057144109

ABSTRACT:
An improved CMOS analog semiconductor apparatus and a fabrication method thereof which are capable of selectively oxidizing a polysilicon, and forming a conductive region and an insulation region of a semiconductor apparatus, for thus improving a metal step coverage of the semiconductor apparatus by using a simpler process, so that it is possible to reduce a defective wiring and crack, and to increase a yield and reliability of the product. The apparatus includes a capacitor including a lower electrode formed on the field insulation layer of the semiconductor substrate, a first insulation layer formed on the field insulation layer including the lower electrode so as to expose a contact region for connecting with the first insulation layer, an upper electrode connection layer formed on an upper surface except for the contact region of the first insulation layer, a resistance device formed on the upper electrode connection layer, a lower electrode connection layer for forming a contact portion with the lower electrode, a second insulation layer formed in a region of the silicide layers of the first insulation layer and the lower electrode for insulating the upper and lower electrode connection layers, and a metallic layer for forming a contact portion with the upper and lower electrode layers.

REFERENCES:
patent: 5393691 (1995-02-01), Hsu et al.
patent: 5395782 (1995-03-01), Ohkoda et al.
patent: 5506158 (1996-04-01), Eklund
patent: 5536673 (1996-07-01), Hong et al.

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