Method for fabricating capacitor of semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S399000, C257SE21646

Reexamination Certificate

active

07659164

ABSTRACT:
A method for fabricating a capacitor of a semiconductor device comprises forming a silicon nanowire structure having a large aspect ratio using a porous anodic alumina structure and applying the silicon nanowire structure to a bottom electrode, thereby obtaining a capacitor having secured capacitance.

REFERENCES:
patent: 6858891 (2005-02-01), Farnworth et al.
patent: 7081385 (2006-07-01), Farnworth et al.
patent: 7365395 (2008-04-01), Stumbo et al.
Hochbaum, et al., “Controlled Growth of Si Nanowire Arrays for Device Integration,” Nano Letters, vol. 5, No. 3, pp. 457-460 (2005).
Nishio, et al., “Fabrication of Ideally Ordered Anodic Porous Alumina with Large Area by Vacuum Deposition of Al Onto Mold,”J. Vac. Sci. Technol.. B—Microelectronics and Nanometer Structures, 26(1), pp. L10-L12 (2008).

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