Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-12-17
2004-09-21
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S253000, C438S724000
Reexamination Certificate
active
06794241
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for fabricating a capacitor in a semiconductor device; and, more particularly, to a method for fabricating a capacitor with use of a Ta
2
O
5
dielectric material so as to improve capacitance and leakage current characteristics.
DESCRIPTION OF RELATED ARTS
As known, a capacitor having a structure wherein a dielectric material is put in between a lower electrode and an upper electrode functions as a memory site for storing a predetermined number of data in a memory device such as a DRAM.
Capacitance of the capacitor is directly proportional to a surface area of an electrode and a dielectric constant of a dielectric material. Hence, it is evidently necessary to use a dielectric material having a high dielectric constant or increase a surface area through a hemi spherical grain technique or decrease a distance between electrodes to obtain a capacitor with a high capacitance.
Hereinafter, a typical method for fabricating a capacitor will be described with reference to
FIGS. 1
to
4
.
First of all, as shown in
FIG. 1
, a polysilicon
11
for the use in a lower electrode of a capacitor is formed on a substrate
10
previously constructed with prepared device elements such as a transistor. Then, a native oxide layer formed at the polysilicon lower electrode
11
is removed by performing a HF cleaning process.
FIG. 1
illustrates this process of the removal.
After removing the native oxide layer, a surface of the polysilicon lower electrode
11
is nitridated through a rapid thermal process or an ammonia (NH
3
) plasma process in an atmosphere of nitrogen. The reason for the nitridation is to impede oxygen, released from a high thermal process proceeded in an atmosphere of oxygen after forming a dielectric material, from penetrating into the dielectric material and oxidizing the polysilicon lower electrode
11
.
Referring to
FIG. 3
, a Ta
2
O
5
dielectric material
12
is deposited on the polysilicon lower electrode
11
. The Ta
2
O
5
dielectric material
12
is deposited on a wafer, specifically heated at an appropriate temperature by setting a source gas, e.g., Ta(OC
2
H
5
)
5
and a reactant gas, e.g., O
2
to react within a reaction chamber.
The deposition of the Ta
2
O
5
dielectric material is followed by the high thermal process in order to induce crystallization of the Ta
2
O
5
dielectric material
12
, depletion of carbon and supplement of oxygen within the dielectric material. The high thermal process is performed at a temperature in a range from about 650° C. to about 800° C. in an atmosphere of either N
2
O or O
2
for a prolonged period.
As illustrated in
FIG. 4
, an upper electrode
13
formed with TiN and polysilicon is deposited on the Ta
2
O
5
dielectric material. Through the steps as described above, the capacitor fabrication is completed.
However, the capacitor, fabricated in accordance with the typical method, has a disadvantage that oxygen penetrates into the Ta
2
O
5
dielectric material and oxidizes the lower electrode constructed with polysilicon when carrying out the high thermal process proceeded after fabricating the dielectric material.
Therefore, a rapid thermal process or an ammonia plasma process is performed in an atmosphere of nitrogen after forming the polysilicon lower electrode
11
in order to prevent the oxidization of the polysilicon. However, in case of employing the ammonia plasma process, there is a problem of a poor step coverage, resulting in an incomplete nitridation over a whole surface of a memory cell, thereby, eventually failing to prevent the oxidization of the polysilicon lower electrode
11
.
The oxidized lower electrode along with the Ta
2
O
5
dielectric material enacts as a double dielectric material, which is a factor that reduces capacitance of a device and provokes a leakage current characteristic.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method for fabricating a capacitor in a semiconductor device that is able to improve capacitance and leakage current characteristics.
In accordance with an aspect of the present invention, there is provided a method for fabricating a capacitor in a semiconductor device, including the steps of: forming a lower electrode on a substrate; cleaning the lower electrode with use of HF and NH
4
OH; nitrifying the lower electrode through a NH
3
annealing; depositing a nitride layer on the nitrified lower electrode; and forming sequentially a dielectric material and an upper electrode on the nitride layer.
In accordance with another aspect of the present invention, the novel method for fabricating a capacitor particularly with use of a Ta
2
O
5
dielectric material includes two separate steps of a nitridation process. After forming a polysilicon lower electrode, the nitridation process is first instigated with a NH
3
annealing process performed in a furnace and then subsequently with a deposition of a nitride layer. The two separate steps strongly prevent the lower electrode from being oxidized so as to improve a leakage current characteristic and prevent the reduction of capacitance. Also, instead of employing solely a HF cleaning process after forming of the lower electrode, both HF and NH
4
OH are used for the cleaning process to reinforce the improvement of the characteristic in leakage current.
REFERENCES:
patent: 6365486 (2002-04-01), Agarwal et al.
patent: 6410400 (2002-06-01), Lee et al.
patent: 6544900 (2003-04-01), Raaijmakers et al.
Kim Kyong-Min
Oh Hoon-Jung
Park Jong-Bum
Hynix / Semiconductor Inc.
Jacobson & Holman PLLC
Tsai H. Jey
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