Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1998-09-18
2000-06-06
Niebling, John F.
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438533, 438586, 438637, 438638, 438639, 438652, H01L 21425
Patent
active
06071798&
ABSTRACT:
The present invention provides a novel method for fabricating a buried contact extending under the first conductive layer 16 and subjacent first insulating layer 14. A first insulating layer 14 and a first conductive layer are formed over a silicon substrate 10 having isolation structures 12. A photoresist mask 18A having a buried contact opening 20 is formed over the first conductive layer. The first conductive layer 16 and the first insulating layer 14 are etched through the photoresist mask 18A. A width 21 of the photoresist mask 18A adjacent to the buried contact opening 20 is removed using a descum process, thereby forming an expanded opening 20A and an exposed ring 16A of the first conductive layer 16 with subjacent first insulating layer 14. Impurity ions 23 are implanted through the expanded opening 20A at a sufficient energy level to form a novel buried contact region 22 comprising an extended buried contact region 22A extending under the exposed ring 16A of the first conductive layer 16 and an exposed area 22B where the first conductive layer and the first insulating layer were removed. The photoresist mask 18A is removed. A second conductive layer 24 and a polycide layer 26 are formed over the first conductive layer 16 and over the exposed area 22B of the buried contact region 22. The polycide layer 26, the second conductive layer 24, the first conductive layer 16 and the first insulating layer 14 are patterned to form a second opening 30 partially overlapping the extended buried contact region and defining a gate structure 31 and a contact structure 33. Lightly doped source/drain regions 32, sidewall spacers 34, and source/drain structures 38 are formed.
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Lee Jin-Yuan
Liaw Jhon-Jhy
Wuu Shou-Gwo
Yaung Dun-Nian
Ackerman Stephen B.
Niebling John F.
Saile George O.
Stoffel William J.
Taiwan Semiconductor Manufacturing Company
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