Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-03-28
2006-03-28
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S255000, C438S244000, C257S303000
Reexamination Certificate
active
07018893
ABSTRACT:
Bottom electrodes of stacked capacitor cells are formed by lining a patterned hard mask with a conductive layer. The hard mask is formed by a layered stack. Subsequent to the formation of trenches within the hard mask, the top-most masking layer of the layer stack is laterally recessed. The bottom electrode layer is then deposited to line the trenches. Following this, the bottom electrode layer is removed from the top of the hardmask. Subsequently, the hard mask is removed. As a result, released and free-standing elements of the conductive layer are formed as bottom electrodes that include a hydrophobic contact area in the top part of the bottom electrodes.
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patent: 6348709 (2002-02-01), Graettinger et al.
patent: 2005/0127426 (2005-06-01), Nishikawa
C.H. Mastrangelo, Mechanical Stability and Adhesion of Microstructures Under Capillary Forces—Part I: Basic Theory, Journal of Microelectromechanical Systems, vol. 2, No. 1, Mar. 1993, pp. 33-43.
C.H. Mastrangelo, Suppression of Stiction in MEMS, 1999 Spring MRS Meeting, Boston, MA, 1999, pp. 1-12.
Jung-Mu Kim et al., Continuous Anti-Stiction Coatings Using Self-Assembled Monolayers for Gold Microstructures, Journal of Micromechanics and Microengineering, 12 (2002) pp. 688-695.
Chaudhari Chandra
Edell Shapiro & Finnan LLC
Infineon - Technologies AG
Yevsikov Victor V.
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