Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-06-26
2003-08-05
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S350000, C438S369000, C438S532000
Reexamination Certificate
active
06602747
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods for fabricating BiCMOS device structures. More particularly, the present invention relates to methods for fabricating, with enhanced performance, BiCMOS device structures.
2. Description of the Related Art
Semiconductor integrated circuit microelectronic fabrications are formed from semiconductor substrates within and upon which are formed semiconductor devices, and over which are formed patterned conductor layers which are separated by dielectric layers.
As semiconductor integrated circuit microelectronic fabrication functionality and integration levels have increased, and semiconductor device dimensions have decreased, it has become more common in the art of semiconductor integrated circuit microelectronic fabrication to employ hybrid devices, such as in particular bipolar complementary metal oxide semiconductor (BiCMOS) devices, when fabricating semiconductor integrated circuit microelectronic fabrications. BiCMOS devices are desirable in the art of semiconductor integrated circuit microelectronic fabrication when fabricating semiconductor integrated circuit microelectronic fabrications insofar as BiCMOS devices often provide an optimal compromise of enhanced semiconductor device speed and reduced semiconductor device power consumption when operating semiconductor integrated circuit microelectronic fabrications.
While BiCMOS devices are thus desirable in the art of semiconductor integrated circuit microelectronic fabrication and often essential in the art of semiconductor integrated circuit microelectronic fabrication, BiCMOS devices are nonetheless not entirely without problems in the art of semiconductor integrated circuit microelectronic fabrication. In that regard, insofar as BiCMOS devices are generally fabricated employing more involved and complex semiconductor fabrication processes, BiCMOS devices are often not readily efficiently fabricated with optimized and enhanced performance.
It is thus desirable in the art of semiconductor integrated circuit microelectronic fabrication to provide methods and materials for fabricating BiCMOS devices with enhanced performance.
It is towards the foregoing object that the present invention is directed.
Various BiCMOS devices having desirable properties, and methods for fabrication thereof, have been disclosed in the art of semiconductor integrated circuit microelectronic fabrication.
Included among the BiCMOS devices and methods for fabrication thereof, but not limited among the BiCMOS devices and methods for fabrication thereof, are BiCMOS devices and methods for fabrication thereof disclosed within: (1) Lee, in U.S. Pat. No. 5,557,131 (a BiCMOS device and method for fabrication thereof having attenuated emitter contact to base contact leakage by forming within the BiCMOS device an emitter contact elevated with respect to a base contact); and (2) Ilderem et al., in U.S. Pat. No. 5,661,046 (a BiCMOS device and method for fabrication thereof having enhanced performance, by employing separate ion implants for forming a base region within a bipolar transistor device within the BiCMOS device and source/drain regions within a field effect transistor (FET) device within the BiCMOS device).
Desirable in the art of semiconductor integrated circuit microelectronic fabrication are additional methods which may be employed for forming BiCMOS devices with enhanced performance.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for fabricating a BiCMOS device.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the BiCMOS device is fabricated with enhanced performance.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for fabricating a bipolar transistor device.
To practice the method of the present invention, there is first provided a semiconductor substrate having formed therein a collector well having a collector contact region of a first polarity. There is then formed within the collector well a base well having a base contact region of a second polarity opposite the first polarity. There is also defined within the base well an emitter contact region for an emitter of the first polarity. There is then formed contacting the base contact region a polysilicon base contact of the second polarity and formed contacting the emitter contact region a polysilicon emitter contact of the first polarity. Finally, there is then implanted into the polysilicon base contact a dose of a dopant of the second polarity while masking the polysilicon emitter contact.
Within the present invention, the method for fabricating the bipolar transistor device may be extended to a method for fabricating a BiCMOS device having formed therein the bipolar transistor device.
The present invention provides a method for fabricating a BiCMOS device, wherein the BiCMOS device is fabricated with enhanced performance.
The present invention realizes the foregoing object by implanting into a polysilicon base contact of a bipolar transistor device which may be employed within the BiCMOS device a dose of a dopant while masking a polysilicon emitter contact of the bipolar transistor device which may be employed within the BiCMOS device.
The method of the present invention is readily commercially implemented.
The present invention employs methods and materials are generally known in the art of semiconductor integrated circuit microelectronic fabrication, but employed within the context of a specific process sequencing to provide the method of the present invention. Since it is thus at least in part a specific process sequencing which provides at least in part the present invention, rather than the existence of methods and materials which provides the present invention, the method of the present invention is readily commercially implemented.
REFERENCES:
patent: 5071778 (1991-12-01), Solheim
patent: 5100824 (1992-03-01), Vora
patent: 5453389 (1995-09-01), Strain et al.
patent: 5557131 (1996-09-01), Lee
patent: 5661046 (1997-08-01), Ilderem
patent: 6281060 (2001-08-01), Igarashi et al.
Shen Guan-Jie
Shieh Yung-Yen
Yang Fu-Chih
LandOfFree
Method for fabricating bipolar complementary metal oxide... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating bipolar complementary metal oxide..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating bipolar complementary metal oxide... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3123799