Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-09
2007-10-09
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S305000, C438S308000, C438S530000
Reexamination Certificate
active
11067287
ABSTRACT:
A method for fabricating an asymmetric semiconductor device is provided. A substrate formed with at least one base structure of MOSFET thereon is provided, wherein the base structure includes a gate over the substrate and a source extension and a drain extension in the substrate beside the gate. The base structure is then treated with an anisotropic annealing source inclined in the source-to-drain direction of the base structure relative to the normal of the substrate, such that one of the source and drain extensions is shadowed by the gate and the other is annealed more.
REFERENCES:
patent: 5344787 (1994-09-01), Nagalingam et al.
patent: 5403772 (1995-04-01), Zhang et al.
patent: RE35036 (1995-09-01), Yabu et al.
patent: 5999238 (1999-12-01), Ihara
patent: 6001714 (1999-12-01), Nakajima et al.
patent: 6911717 (2005-06-01), Jyumonji
patent: 6-188264 (1994-07-01), None
Chen Yi-Cheng
Chen Yu-Kun
Li Gene
Liu Earic
J.C. Patents
Smith Zandra V.
Thomas Toniae M.
United Microelectronics Corp.
LandOfFree
Method for fabricating asymmetric semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating asymmetric semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating asymmetric semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3903358