Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-09
2000-03-28
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438262, A01L 218247
Patent
active
060431210
ABSTRACT:
A method for fabricating an OTP-ROM includes a first polysilicon layer formed over a semiconductor substrate. An ion implanting process is performed to form a diffusion region inside the substrate on both sides of the first polysilicon layer. This diffusion region acts as a bit line. Then, a second polysilicon layer is formed to cover the first polysilicon layer. The second polysilicon layer is patterned to form a control gate. The patterning process is continued to further pattern the first polysilicon layer to form a floating gate.
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patent: 5666311 (1997-09-01), Mori
patent: 5930628 (1999-07-01), Chang
patent: 5946230 (1999-08-01), Shimizu et al.
Booth Richard
United Microelectronics Corp.
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