Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-06-05
1998-10-06
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438529, H01L 21336
Patent
active
058175636
ABSTRACT:
A method for fabricating an MOS transistor of an LDD structure having reduced short channel effects and GIDL (Gate Induced Drain Leakage) including the steps of providing a semiconductor substrate, forming a field oxide film in a field region of the semiconductor substrate, forming a gate electrode having a gate insulating film and a cap gate insulating film in an active region on the semiconductor substrate, forming L-shaped insulating sidewalls at sides of the gate electrode, forming high density source/drain regions in the semiconductor substrate in the active region using the gate electrode and the L-shaped insulating sidewalls as masks,etching the L-shaped insulating sidewalls into I-shaped insulating sidewalls, and forming lightly doped source/drain regions in the semiconductor substrate active region using the I-shaped insulating sidewalls and the gate electrode as masks.
REFERENCES:
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4728617 (1988-03-01), Woo et al.
patent: 4818714 (1989-04-01), Haskell
patent: 4908326 (1990-03-01), Ma et al.
Chaudhari Chandra
LG Semicon Co. Ltd.
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