Method for fabricating an electrostatistic discharge protection

Details Method for fabricating an electrostatistic discharge protection Method for fabricating an electrostatistic discharge protection

1999-02-02

2000-03-21

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438200, 438210, 438275, 438592, 438595, H01L 21336, H01L 218234

Patent

active

060402229

ABSTRACT:
An improved method for fabricating an ESD protection device so as to avoid ESD damage to a wafer. The improved method includes simultaneously forming an internal circuit and the ESD protection device without additional photomask or other process. The improved method uses a P.sup.+ doped region to take the place of an N.sup.- doped region of an interchangeable source/drain region with a LDD structure for the ESD protection device, of which its trigger voltage is adjusted by simply varying the P.sup.+ concentration.

REFERENCES:
patent: 4441931 (1984-04-01), Levin
patent: 4677739 (1987-07-01), Doering et al.
patent: 4874714 (1989-10-01), Eklund
patent: 5517049 (1996-05-01), Huang
patent: 5672898 (1997-09-01), Keller et al.
patent: 5757051 (1998-05-01), Wu et al.

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