Method for fabricating a voltage-stable PMOSFET...

Details Method for fabricating a voltage-stable PMOSFET... Method for fabricating a voltage-stable PMOSFET...

2005-12-08

2009-02-10

Lindsay, Jr., Walter L (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S235000, C438S306000, C438S372000, C257SE21043, C257SE21188, C257SE21371

Reexamination Certificate

active

07488638

ABSTRACT:
A method for fabricating integrable PMOSFET semiconductor structures in a P-doped substrate which are distinguished by a high dielectric strength is provided. In order to fabricate the PMOSFET semiconductor structure, a mask is applied to a semiconductor substrate for the definition of a window delimited by a peripheral edge. An N-doped well is thereupon produced in the P-doped semiconductor substrate by means of high-voltage ion implantation through the window delimited by the mask, the edge zone of said N-doped well reaching as far as the surface of the semiconductor substrate. The individual regions for the source, drain and bulk of the PMOSFET semiconductor structure are then produced in the P-doped inner zone enclosed by the well. The P-doped inner zone forms the drift zone of the PMOSFET structure. Since the drift zone has the weak basic doping of the substrate, the PMOSFET has a high dielectric strength.

REFERENCES:
patent: 2003/0001206 (2003-01-01), Negoro et al.
patent: 2004/0063291 (2004-04-01), Williams et al.
patent: 2004/0251492 (2004-12-01), Lin
patent: WO00/19503 (2000-04-01), None

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