Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-03-31
2001-04-24
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S217000, C438S154000
Reexamination Certificate
active
06221707
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to integrated circuits in general, and in particular to a method for fabricating transistors within an integrated circuit. Still more particularly, the present invention relates to a method for fabricating transistors having an variable threshold voltage.
2. Description of the Prior Art
A metal oxide semiconductor field effect transistor (MOSFET) or MOS transistor has two regions in a silicon substrate, namely, a source and a drain, which are disposed at a certain distance from each other. The MOS transistor also has an insulated gate disposed between the source and the drain. The gate is characterized by a threshold voltage (V
TH
) that determines the boundary between an ON state and an OFF state in the drain current.
It is well-known in the art that the threshold voltage of a MOS transistor changes as a function of temperature due to the availability of mobile electrons and other factors. Generally speaking, the threshold voltage decreases as temperature increases, or alternately, the threshold voltage increases as the temperature decreases. Because of the temperature dependence of the threshold voltage, the design of an integrated circuit having millions of MOS transistors that are capable of operating over a wide temperature range is a challenging task.
Many attempts have been made to adjust the threshold voltage of a MOS transistor such that the operating temperature range of the MOS transistor can be extended. One such attempt is to bias the body of the MOS transistor at a higher voltage level. However, biasing requires a biasing source to contact the body of the MOS transistor, which results in a much larger circuit than normally desired. The threshold voltage of a MOS transistor can also be adjusted by changing the doping concentrations within the substrate and wells in which the MOS transistor is located. However, this alteration can only accommodate for temperature changes within a small range. Therefore, it should be appreciated that there is a need to control the threshold voltage of MOS transistors within an integrated circuit in order to compensate for a wide operating temperature range.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, the energy levels of a transistor can be represented by a valance band, a conduction band, and a Fermi level. In order to fabricate a transistor with a variable threshold voltage, a region of the transistor is initially doped with a first dopant having a first energy level below the Fermi level. The region of the transistor is subsequently doped with a second dopant having a second energy level above the Fermi level. Alternatively, the region of the transistor can be initially doped with a first dopant having a first energy level above the Fermi level, and then the region of the transistor can be subsequently doped with a second dopant having a second energy level below the Fermi level.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 4364778 (1982-12-01), Leamy et al.
patent: 6096611 (2000-08-01), Wu
Felsman Bradley Vaden Gunter & Dillon, LLP
International Business Machines - Corporation
Lytle Craig P.
Salys Casimer K.
Smith Matthew
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