Method for fabricating a transistor configuration including...

Details Method for fabricating a transistor configuration including... Method for fabricating a transistor configuration including...

2006-02-28

2006-02-28

Pham, Hoai (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S270000

Reexamination Certificate

active

07005351

ABSTRACT:
A method for fabricating a transistor configuration including at least one trench transistor cell has a gate electrode and a field electrode disposed in a trench below the gate electrode. The trenches are formed in a semiconductor substrate. A drift zone, a channel zone, and a source zone are in each case provided in the semiconductor substrate. According to the invention, the source zone and/or the channel zone are formed at the earliest after the introduction of the trenches into the semiconductor substrate by implantation and diffusion.

REFERENCES:
patent: 5283201 (1994-02-01), Tsang et al.
patent: 5801417 (1998-09-01), Tsang et al.
patent: 5998833 (1999-12-01), Baliga
patent: 6051468 (2000-04-01), Hshieh
patent: 6191447 (2001-02-01), Baliga
patent: 6198127 (2001-03-01), Kocon
patent: 6291298 (2001-09-01), Williams et al.
patent: 100 38 177 (2002-02-01), None
patent: 1 170 803 (2002-01-01), None
patent: 97/00536 (1997-01-01), None
patent: 01/71817 (2001-09-01), None

Affiliated with

Also associated with

Rating

Method for fabricating a transistor configuration including... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating a transistor configuration including..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a transistor configuration including... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3704154