Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-02-09
2010-06-08
Doan, Theresa T (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S149000, C438S300000, C257S347000, C257S377000
Reexamination Certificate
active
07732288
ABSTRACT:
A method for fabricating a semiconductor structure. The novel transistor structure comprises first and second source/drain (S/D) regions whose top surfaces are lower than a top surface of the channel region of the transistor structure. A semiconductor layer and a gate stack on the semiconductor layer are provided. The semiconductor layer includes (i) a channel region directly beneath the gate stack, and (ii) first and second semiconductor regions essentially not covered by the gate stack, and wherein the channel region is disposed between the first and second semiconductor regions. The first and second semiconductor regions are removed. Regions directly beneath the removed first and second semiconductor regions are removed so as to form first and second source/drain regions, respectively, such that top surfaces of the first and second source/drain regions are below a top surface of the channel region.
REFERENCES:
patent: 5994747 (1999-11-01), Wu
patent: 6010936 (2000-01-01), Son
patent: 6214679 (2001-04-01), Murthy et al.
patent: 6414353 (2002-07-01), Maeda et al.
patent: 6437404 (2002-08-01), Xiang et al.
patent: 6465313 (2002-10-01), Yu et al.
patent: 6787852 (2004-09-01), Yu et al.
patent: 6927110 (2005-08-01), Kanemoto
patent: 7566624 (2009-07-01), Leitner et al.
patent: 2003/0025135 (2003-02-01), Matsumoto et al.
Chidambarrao Dureseti
Clevenger Lawrence A.
Dokumaci Omer H.
Gluschenkov Oleg
Kumar Kaushik A.
Capella Steven
Doan Theresa T
International Business Machines - Corporation
Schmeiser Olsen & Watts
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