Method for fabricating a semiconductor structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S302000, C438S306000, C438S386000, C438S528000, C438S530000

Reexamination Certificate

active

10995677

ABSTRACT:
A method fabricates a semiconductor structure having a plurality of memory cells that are provided in a semiconductor substrate of a first conductivity type and contains a plurality of planar selection transistors and a corresponding plurality of storage capacitors connected thereto. The selection transistors have respective first and second active regions of a second conductivity type. The first active regions are connected to the storage capacitors and the second active regions are connected to respective bit lines, and respective gate stacks, which are provided above the semiconductor substrate in a manner insulated by a gate dielectric. In this case, a single-sided halo doping is effected, and an excessive outdiffusion of the halo doping zones is prevented by introduction of a diffusion-inhibiting species.

REFERENCES:
patent: 6238967 (2001-05-01), Shiho et al.
patent: 6444548 (2002-09-01), Divakaruni et al.
patent: 2001/0046745 (2001-11-01), Divakaruni et al.
patent: 102 40 429 (2004-03-01), None

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