Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-09-12
2006-09-12
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S386000
Reexamination Certificate
active
07105404
ABSTRACT:
The present invention provides a method for fabricating a semiconductor structure having the steps of: providing a semiconductor substrate (1) made of silicon with a first hard mask layer (10; 10′) made of silicon oxide and an overlying second hard mask layer (15; 15′) made of silicon; providing a masking layer (30; 30′) made of silicon oxide above and laterally with respect to the second hard mask layer (15; 15′) made of silicon and above an uncovered edge region (RB) of the semiconductor substrate (1); providing a photoresist mask (25) above the masking layer (30; 30′) with openings corresponding from trenches (DT) to be formed in the semiconductor substrate (1); opening the masking layer (30; 30′) in a first plasma process using the photoresist mask (25), the edge region (RB) being covered by a shielding device (AR); opening the first hard mask layer (10; 10′) and second hard mask layer (15; 15′) in a second and third plasma process; and forming the trenches (DT) in the semiconductor substrate (1) in a fourth plasma process using the opened first hard mask layer (10; 10′); the edge region (RB) not being covered by the shielding device (AR) in the second to fourth plasma processes.
REFERENCES:
patent: 6235214 (2001-05-01), Deshmukh et al.
patent: 2001/0055664 (2001-12-01), Engelhardt et al.
patent: 2003/0139052 (2003-07-01), Tsai et al.
patent: 2004/0005516 (2004-01-01), Chen
patent: 0928018 (1999-07-01), None
patent: 0942461 (1999-09-01), None
Seitz Mihel
Wege Stephan
Morrison & Foerster / LLP
Tsai H. Jey
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